Home made 555 timer from NPN and PNP transistors

Before the 555 contest was announced I was reading the free online book 50 555 Circuits from talking electronics. I was very amazed with how much could be done with the 555 timer. So I decided the best way to understand the 555 would be to try and build one. First I looked at some generic block diagrams and also the schematic diagram published in the National Semiconductor datasheet. After I understood the theory, I tested it out in my favorite circuit simulator by Paul Falstad. This program should be up to the task of simulating at a very high level.


So far so good, Next I needed to build an SR latch out of transistors. A SR or Set Reset latch consists of two NOR gates. When S is set high Q will stay high until S is set low and R is set high. This circuit is useful in itself for button de-bouncing. I did a simulation building out the latch only using NPN transistors.


After tweaking the resistor values I went ahead started building out the circuit. For reliability and ease I decided to use the Manhattan Style of construction, a variant of of Ugly Construction. This style is very popular in the QRP Ham Radio community. It consists of using little copper pads on top of a sheet of copper clad. It has many advantages including prototyping speed, high reliability, low noise, high frequency opearation, and last it allows you to mix and match through hole and surface mount parts. The disadvantages is well, it’s ugly looking.


Using a cheap Harbor Freight punch I cut out all the the circular pads in two different diameters. I then clean the corrosion off the pads using sand paper, This helps with soldering and gluing.


Pads are glued to the board with a generic super glue and then fluxed and tinned with solder. I can then cut and bend the parts leads in order to solder them to the board. All NPN transistors are 2n3904 and PNP are 2n2907.


The circuit tested just fine, Now for something a bit more challenging, designing the voltage comparators. I looked at some transistor op-amps schematics along with the LM555 data sheet schematic. The first op amp appeared to use Darlington pair NPN transistors. I simplified things a bit by directly using resistors instead of current mirrors. I played with a few variants of the circuit and decided on the one below.


Since I was not too confident about how it would work I tested it on a breadboard first. My major concerns were if it was going to be able to drive the SR latch and if the imperfect current gain (Beta) would throw off the comparator.

When the negative side was connected to the reference and the positive was to the variable power it worked great. However the opposite was not true. Looking back at the data sheet it appears the LM555 uses PNP transistors for the second voltage comparator. I was hopping I could just build two of these and move on. So I had to go back to the simulator and play with some other designs.


The Transistor on the right is not part of the voltage comparator but there to simulate this interfacing with the next stage. When I interfaced with the SR latch I bypassed the 10k resistor connected to the base.


Here I am testing both comparators connecting to the SR latch. The reference voltages is coming from three 22k resistors on the breadboard. The top refrence should be (Vcc *.66) and the bottom is (Vcc *.33). Vcc is a 9v battery and the input was a variable power supply.


Besides having a huge mess of wires everywhere it seems to work out just fine. The switching is not perfect on 3 and 6 volts but this is probably because the battery is not perfectly 9v and the resistors are not perfect.


Here is the final board with all the modules cleaned up and soldered together with the the series 5k resistors on the board. It should have been obvious before but this was the first time I realized why this device is called the 555, it has to be because of the three 5k series resistors that govern how the device behaves. The transistor to drain the timing capacitor is on the bread board. It was not possible to drive it directly from the latch so I had to use another transistor as a voltage follower. In the video clip it is wired as an astable oscillator with R1 and R1 at 1K and C1 = 470uF and it looks to be working satisfactory.

Here it is running much faster, R1 and R2 are still 1k but C1 is now .015uF. That should equal 34.44khz with a duty cycle of %66. From the scope I roughly measured 31.2k and visually it look to be about %66. So I would say this is functionality correctly.


So after three weeks and using 15 BJTs plus some sacrifices to error I have a huge 555 timer. This particular design does not have the output buffer stage but than can be added easily and not need for this testing. In the unlikely even’t 555s no longer exist I am prepaid. More importantly this project has really help me understand analog circuity, an art I feel that is an art that is dying fast in the digital world. I hope this information proves to be useful or at least inspire. Maybe I will tackle an LM741 next. You can see the full photo set on my Flickr page.


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